Simulation file

Project File Best Practices. Managing Project Settings. Specifying the Target Device or Board 2. Optimizing Project Settings. Optimize Settings with Project Revisions 2. Back-Annotate Optimized Assignments.

Managing Logic Design Files. Including Design Libraries 2. Creating a Project Copy. Exporting Compilation Results. Exporting a Version-Compatible Compilation Database 2.

Importing a Version-Compatible Compilation Database 2. Creating a Design Partition 2. Exporting a Design Partition 2. Reusing a Design Partition 2. Viewing Quartus Database File Information 2. Clearing Compilation Results. Viewing Quartus Database File Information. Migrating Projects Across Operating Systems. Migrating Design Files and Libraries 2. Design Library Migration Guidelines. Migrating Design Files and Libraries.

Use Relative Paths. Archiving Projects. Manually Adding Files To Archives 2. Archiving Projects for Service Requests 2. Archiving Projects for External Revision Control 2. Creating Database-Only Archives. Archiving Projects for External Revision Control. Command-Line Interface. Project Revision Commands 2. Project Archive Commands 2.

Project Database Commands. Design Planning. Design Planning 3. Create a Design Specification and Test Plan 3. Plan for the Target Device 3. Plan for Intellectual Property Cores 3. Plan for Standard Interfaces 3. Plan for Device Programming 3. These data are saved to disk, and the entire simulation can be retrieved for additional refinement, printing, etc. Starting a SIM group file. When you have finished the first spectrum in a series of line shape simulations select New Simulation Group from the Sim-Group menu.

Follow the prompts for a simulation name and for a location and filename for the SIM file. The SIM file should be saved to the same location on your computer disk where the spectra are stored. You can then save the current simulation to this file by selecting one of the items in the SimSave menu the current item is checked.

The browser version you are using is not recommended for this site. Please consider upgrading to the latest version of your browser by clicking one of the following links. Note: For Modelsim-Altera software, there is a pre-compiled simulation library. This step will create the library folder and map the library.

Table 1 provides information allowing you to choose which library is needed to compile for VHDL and Verilog. Skip To Main Content. Safari Chrome Edge Firefox.